As a technology leader, NXP is re-imagining how we connect and interact with our advanced portfolio of wireless solutions. Our in-house experts build on decades of leadership in Radio Frequency (RF) technology to not only guide the ongoing expansion of wireless, but also innovate across the entirety of the wireless spectrum. From such short range technologies like NFC and Ultra-Wideband, to Wi-Fi 6 and 5G, the NXP team is driving global market adoption of these cutting-edge technologies. When combined with the processing power of the EdgeVerse platform, NXP is uniquely positioned to enable smart connected devices for IoT, industrial, auto and communication infrastructure applications—making lives easier, safer, and more convenient.
Joining the NXP Wireless Connectivity team means you will have unparalleled opportunities to develop the best-in-class products with the latest IEEE standards in advanced processing nodes; it means you will work with a group of passionate and talented engineers to tackle the most crucial tasks leading the next-generation of innovations including Wi-Fi 7 technologies.
NXP’s Wireless Connectivity team has an open and inclusive work environment that promotes excellence, innovation, collaboration, and integrity. An expanding business comes with tremendous career opportunities which will challenge and grow your talents. If you are ready to start the next chapter of your career in the wireless area, you don’t want to miss this opportunity to join a world leader in this technology.
NXPs’ Wireless Connectivity team currently have job opening(s) in the following area(s):
Entry Level Design for Test (DFT) Engineer
About the Position:
As a member of a wireless Design For Test (DFT) team, the candidate will work with Senior level DFT Engineers to design, develop MBIST and perform scan/edt insertion as well as pattern generation for various mixed-signals Chips.
The member will also have an opportunity to design customized DFT module and develop the verification plan for DFT modules.
- MBIST flow implementation/automation
- Scan/EDT insertion and ATPG with Mentor tools
- Verification of DFT Logic and analysis of fault coverage
- Timing analysis for DFT Modes
- Candidate MUST be MS or above degree in CS/EE or related technical field(s)
- Knowledge of DFT fundamentals
- Knowledge of Logic design & Static timing analysis
- Knowledge of Verilog, SV and any scripting language (perl, etc)
- Experience working on Mentor/Synopsys DFT tools is a big plus
This position is available as of July 2022.