Job Title: ASIC Digital Design Engineer
Job Purpose and Mandate:
This position is an ASIC/Digital Design Engineer whose mandate is to participate in the design of semiconductor integrated circuits in compliance with the project’s specifications and Synopsys’ design methodologies. The successful candidate will work on a variety of design and verification tasks, incorporating such tasks as, and not limited to, RTL coding, behavior coding, RTL simulation, synthesis, STA, gate-level simulation, formal verification, documentation, and prototype evaluation.
Documentation of functionality, code, verification environments/plans, and design procedures.
Write behavior models and RTL code for circuit portions of integrated circuits.
Perform complex RTL simulations of circuits, interpret the results and optimize the code until the predetermined functionality is satisfied.
Generate timing constraints for synthesizable designs.
May perform logic synthesis and/or static timing analysis.
Perform gate-level simulations of circuits, interpret the results and optimize the design until the predetermined functionality and timing is satisfied.
May participate in prototype evaluation using bench top laboratory instruments or automated test equipment.
Communicate with other Synopsys employees regarding customer technical support.
May communicate directly with customers regarding technical support.
Other related duties as assigned by the manager.
Requires a bachelor degree in Engineering or Applied Science
Familiarity with verilog design and verification.
Knowledge of synthesis, lint, CDC, STA and DFT.
Knowledge of Perl/Shell/Makefile scripts.
Team player with good communication skills of both verbal and written.